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» Fault tolerant mechanism design
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DAC
2009
ACM
14 years 12 months ago
Statistical reliability analysis under process variation and aging effects
Circuit reliability is affected by various fabrication-time and run-time effects. Fabrication-induced process variation has significant impact on circuit performance and reliabilit...
Yinghai Lu, Li Shang, Hai Zhou, Hengliang Zhu, Fan...
DAC
2010
ACM
14 years 2 months ago
Scalable specification mining for verification and diagnosis
Effective system verification requires good specifications. The lack of sufficient specifications can lead to misses of critical bugs, design re-spins, and time-to-market slips. I...
Wenchao Li, Alessandro Forin, Sanjit A. Seshia
FC
2001
Springer
123views Cryptology» more  FC 2001»
14 years 3 months ago
Trust: A Collision of Paradigms
The technological challenges of securing networks are great, as recently witnessed in widespread denial of service and virus attacks. The human reaction to these attacks may be ei...
L. Jean Camp, Helen Nissenbaum, Cathleen McGrath
DAC
2009
ACM
14 years 12 months ago
Online cache state dumping for processor debug
Post-silicon processor debugging is frequently carried out in a loop consisting of several iterations of the following two key steps: (i) processor execution for some duration, fo...
Anant Vishnoi, Preeti Ranjan Panda, M. Balakrishna...
SIGCOMM
2009
ACM
14 years 5 months ago
PortLand: a scalable fault-tolerant layer 2 data center network fabric
This paper considers the requirements for a scalable, easily manageable, fault-tolerant, and efficient data center network fabric. Trends in multi-core processors, end-host virtua...
Radhika Niranjan Mysore, Andreas Pamboris, Nathan ...