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GLVLSI
2007
IEEE
189views VLSI» more  GLVLSI 2007»
14 years 3 months ago
Hardware-accelerated path-delay fault grading of functional test programs for processor-based systems
The path-delay fault simulation of functional tests on complex circuits such as current processor-based systems is a daunting task. The amount of computing power and memory needed...
Paolo Bernardi, Michelangelo Grosso, Matteo Sonza ...
IWCMC
2006
ACM
14 years 3 months ago
Radio propagation patterns in wireless sensor networks: new experimental results
Wireless sensors use low power radio transceivers due to the stringent constraints on battery capacity. As a result, radio transmission with wireless sensors is unreliable. Furthe...
Tereus Scott, Kui Wu, Daniel Hoffman
GLVLSI
2010
IEEE
156views VLSI» more  GLVLSI 2010»
14 years 2 months ago
A multi-level approach to reduce the impact of NBTI on processor functional units
NBTI is one of the most important silicon reliability problems facing processor designers today. The impact of NBTI can be mitigated at both the circuit and microarchitecture leve...
Taniya Siddiqua, Sudhanva Gurumurthi
ISCA
1999
IEEE
187views Hardware» more  ISCA 1999»
14 years 1 months ago
Area Efficient Architectures for Information Integrity in Cache Memories
Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...
Seongwoo Kim, Arun K. Somani
MVA
1998
118views Computer Vision» more  MVA 1998»
13 years 10 months ago
Integrated Vision/Control System for Autonomous Planetary Rovers
Current NASA plans call for extended year-long, multikilometer treks for the 2003 and 2005 Mars missions. A much greater amount of rover autonomy is required compared to the recen...
Terry Huntsberger, Toshiro Kubota, John Rose