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DATE
2008
IEEE
119views Hardware» more  DATE 2008»
14 years 2 months ago
Guiding Circuit Level Fault-Tolerance Design with Statistical Methods
In the last decade, the focus of fault-tolerance methods has tended towards circuit level modifications, such as transistor resizing, and away from expensive system level redunda...
Drew C. Ness, David J. Lilja
CISS
2007
IEEE
14 years 2 months ago
Relay Placement and Movement Control for Realization of Fault-Tolerant Ad Hoc Networks
— Wireless communication is a critical component of battlefield networks. Nodes in a battlefield network exist in hostile environments and thus fault-tolerance against node and...
Abhishek Kashyap, Mark A. Shayman
DSN
2006
IEEE
14 years 1 months ago
Exploring Fault-Tolerant Network-on-Chip Architectures
The advent of deep sub-micron technology has exacerbated reliability issues in on-chip interconnects. In particular, single event upsets, such as soft errors, and hard faults are ...
Dongkook Park, Chrysostomos Nicopoulos, Jongman Ki...
APCSAC
2005
IEEE
14 years 1 months ago
A Fault-Tolerant Routing Strategy for Fibonacci-Class Cubes
Fibonacci Cubes (FCs), together with the enhanced and extended forms, are a family of interconnection topologies formed by diluting links from binary hypercube. While they scale up...
Zhang Xinhua, Peter Loh
DFT
2003
IEEE
120views VLSI» more  DFT 2003»
14 years 1 months ago
Implementation and Testing of Fault-Tolerant Photodiode-Based Active Pixel Sensor (APS)
The implementation of imaging arrays for System-On-a-Chip (SOC) is aided by using faulttolerant light sensors. Fault-tolerant redundancy in an Active Pixel Sensor (APS) is obtaine...
Sunjaya Djaja, Glenn H. Chapman, Desmond Y. H. Che...