163 search results - page 23 / 33 » Features of Future Network Processor Architectures |
SIGCOMM
2009
ACM
14 years 2 months ago
2009
ACM
This paper considers the requirements for a scalable, easily manageable, fault-tolerant, and efficient data center network fabric. Trends in multi-core processors, end-host virtua...
ICS
2009
Tsinghua U.
14 years 6 days ago
2009
Tsinghua U.
Large Multi-Processor Systems-on-Chip use Networks-on-Chip with a high degree of reusability and scalability for message communication. Therefore, network infrastructure is a cruc...
DFT
2003
IEEE
14 years 28 days ago
2003
IEEE
This paper discusses a hybrid optoelectronic scheme for a new interconnection network, "Tori connected mESHes (TESH)". The major features of TESH are the following: it i...
MICRO
2009
IEEE
14 years 2 months ago
2009
IEEE
On-chip networks are critical to the scaling of future multicore processors. The challenge for on-chip network is to reduce the cost including power consumption and area while pro...
IPPS
2005
IEEE
14 years 1 months ago
2005
IEEE
Processing-in-Memory (PIM) technology encompasses a range of research leveraging a tight coupling of memory and processing. The most unique features of the technology are extremel...