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DATE
2000
IEEE
139views Hardware» more  DATE 2000»
14 years 6 days ago
A VHDL Error Simulator for Functional Test Generation
This paper describes an efficient error simulator able to analyze functional VHDL descriptions. The proposed simulation environment can be based on commercial VHDL simulators. Al...
Alessandro Fin, Franco Fummi
FPT
2005
IEEE
170views Hardware» more  FPT 2005»
14 years 1 months ago
High Quality Uniform Random Number Generation Through LUT Optimised Linear Recurrences
This paper describes a class of FPGA-specific uniform random number generators with a 2k −1 length period, which can provide k random bits per-cycle for the cost of k Lookup Ta...
David B. Thomas, Wayne Luk
APSEC
2006
IEEE
14 years 1 months ago
Interaction Testing in Model-Based Development: Effect on Model-Coverage
Model-based software development is gaining interest in domains such as avionics, space, and automotives. The model serves as the central artifact for the development efforts (suc...
Renée C. Bryce, Ajitha Rajan, Mats Per Erik...
ISCAS
2006
IEEE
92views Hardware» more  ISCAS 2006»
14 years 1 months ago
Model of a true random number generator aimed at cryptographic applications
— The paper presents a simple stochastic model of a True Random Number Generator, which extracts randomness from the tracking jitter of a phase-locked loop. The existence of such...
Martin Simka, Milos Drutarovský, Viktor Fis...
ICOIN
2004
Springer
14 years 1 months ago
On Generating Random Network Structures: Connected Graphs
Abstract. In this paper we present the set of base algorithms for generating connected random graphs (RG). RG can be used for testing different algorithms on networks. The fast al...
Alexey S. Rodionov, Hyunseung Choo