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GECCO
2006
Springer
164views Optimization» more  GECCO 2006»
14 years 2 days ago
Biobjective evolutionary and heuristic algorithms for intersection of geometric graphs
Wire routing in a VLSI chip often requires minimization of wire-length as well as the number of intersections among multiple nets. Such an optimization problem is computationally ...
Rajeev Kumar, Pramod Kumar Singh, Bhargab B. Bhatt...
ICPP
2003
IEEE
14 years 1 months ago
Hardware-Assisted Design for Fast Packet Forwarding in Parallel Routers
A hardware-assisted design, dubbed cache-oriented multistage structure (COMS), is proposed for fast packet forwarding. COMS incorporates small on-chip cache memory in its constitu...
Nian-Feng Tzeng
MICRO
2006
IEEE
191views Hardware» more  MICRO 2006»
13 years 8 months ago
CAPSULE: Hardware-Assisted Parallel Execution of Component-Based Programs
Since processor performance scalability will now mostly be achieved through thread-level parallelism, there is a strong incentive to parallelize a broad range of applications, inc...
Pierre Palatin, Yves Lhuillier, Olivier Temam
AIA
2006
13 years 9 months ago
Speeding Up Model-based Diagnosis by a Heuristic Approach to Solving SAT
Model-based diagnosis of technical systems requires both a simulation machinery and a logic calculus. The former is responsible for the system's behavior analysis, the latter...
Benno Stein, Oliver Niggemann, Theodor Lettmann
STTT
2008
162views more  STTT 2008»
13 years 8 months ago
Coping with large design spaces: design problem solving in fluidic engineering
Abstract This paper is about tool support for knowledgeintensive engineering tasks. In particular, it introduces software technology to assist the design of complex technical syste...
Benno Stein