Wire routing in a VLSI chip often requires minimization of wire-length as well as the number of intersections among multiple nets. Such an optimization problem is computationally ...
Rajeev Kumar, Pramod Kumar Singh, Bhargab B. Bhatt...
A hardware-assisted design, dubbed cache-oriented multistage structure (COMS), is proposed for fast packet forwarding. COMS incorporates small on-chip cache memory in its constitu...
Since processor performance scalability will now mostly be achieved through thread-level parallelism, there is a strong incentive to parallelize a broad range of applications, inc...
Model-based diagnosis of technical systems requires both a simulation machinery and a logic calculus. The former is responsible for the system's behavior analysis, the latter...
Abstract This paper is about tool support for knowledgeintensive engineering tasks. In particular, it introduces software technology to assist the design of complex technical syste...