41 search results - page 6 / 9 » Fetch Directed Instruction Prefetching |
MICRO
1994
IEEE
13 years 11 months ago
1994
IEEE
Multiple issue of instructions occurs in superscalar and VLIW machines. This paper investigates a third type of machine design, which combines the advantages of code compatibility...
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
In deep sub-micron technology, the crosstalk effect between adjacent wires has become an important issue, especially between long on-chip buses. This effect leads to the increas...
ASPLOS
2009
ACM
14 years 8 months ago
2009
ACM
Modern processors use branch target buffers (BTBs) to predict the target address of branches such that they can fetch ahead in the instruction stream increasing concurrency and pe...
ASPLOS
2009
ACM
14 years 8 months ago
2009
ACM
Parallel bit stream algorithms exploit the SWAR (SIMD within a register) capabilities of commodity processors in high-performance text processing applications such as UTF8 to UTF-...
FPGA
2004
ACM
14 years 26 days ago
2004
ACM
We describe an effort to prototype an Itanium microarchitecture using an FPGA. The microarchitecture model is written in the Bluespec hardware description language (HDL) and suppo...