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TCAD
2011
13 years 1 months ago
High-Level Synthesis for FPGAs: From Prototyping to Deployment
—Escalating system-on-chip design complexity is the design community to raise the level of abstraction beyond register transfer level. Despite the unsuccessful adoptions of early...
Jason Cong, Bin Liu, Stephen Neuendorffer, Juanjo ...
ICASSP
2011
IEEE
12 years 11 months ago
Multi-rate polyphase DSP and LMS calibration schemes for oversampled data conversion systems
—Architectural schemes for low-power calibration of oversampled analog-to-digital (A/D) systems are presented. Conventional full-rate least-mean squares (LMS) calibration has two...
Subhanshu Gupta, Yi Tang, Kuang-Wei Cheng, Jeyanan...
ICDE
2011
IEEE
235views Database» more  ICDE 2011»
12 years 11 months ago
Fast data analytics with FPGAs
—The rapidly increasing amount of data available for real-time analysis (i.e., so-called operational business intelligence) is creating an interesting opportunity for creative ap...
Louis Woods, Gustavo Alonso
TAMC
2007
Springer
14 years 1 months ago
Improving the Average Delay of Sorting
In previous work we have introduced an average-case measure for the time complexity of Boolean circuits – that is the delay between feeding the input bits into a circuit and the ...
Andreas Jakoby, Maciej Liskiewicz, Rüdiger Re...
GLVLSI
2003
IEEE
130views VLSI» more  GLVLSI 2003»
14 years 21 days ago
Zero overhead watermarking technique for FPGA designs
FPGAs, because of their re-programmability, are becoming very popular for creating and exchanging VLSI intellectual properties (IPs) in the reuse-based design paradigm. Existing w...
Adarsh K. Jain, Lin Yuan, Pushkin R. Pari, Gang Qu