172 search results - page 30 / 35 » FinFET-based SRAM design |
MICRO
2007
IEEE
14 years 1 months ago
2007
IEEE
Transactional Memory (TM) systems must track the read and write sets—items read and written during a transaction—to detect conflicts among concurrent transactions. Several TM...
DSN
2002
IEEE
14 years 12 days ago
2002
IEEE
This paper examines the effect of technology scaling and microarchitectural trends on the rate of soft errors in CMOS memory and logic circuits. We describe and validate an end-to...
CCR
2005
13 years 7 months ago
2005
Internet routers require buffers to hold packets during times of congestion. The buffers need to be fast, and so ideally they should be small enough to use fast memory technologie...
ISCAS
2008
IEEE
14 years 1 months ago
2008
IEEE
—This paper presents three techniques to reduce the power consumption in ternary content-addressable memories (TCAMs). The first technique is to use newly developed monolithical...
ISCA
2010
IEEE
13 years 11 months ago
2010
IEEE
Technology advancements have enabled the integration of large on-die embedded DRAM (eDRAM) caches. eDRAM is significantly denser than traditional SRAMs, but must be periodically r...