172 search results - page 7 / 35 » FinFET-based SRAM design |
DAC
2011
ACM
12 years 7 months ago
2011
ACM
SRAM design has been a major challenge for nanoscale manufacturing technology. We propose a new bit cell repair scheme for designing maximum-information memory system (MIMS). Unli...
CF
2011
ACM
12 years 7 months ago
2011
ACM
Ubiquitous computing has become a very popular paradigm. The most suitable technological solution for those systems consists of using hybrid processors able to operate at high vol...
ARVLSI
1997
IEEE
13 years 11 months ago
1997
IEEE
The growing gap between on-chip gates and off-chip I/O bandwidth argues for ever larger amounts of on-chip memory. Emerging portable consumer technology, such as digital cameras, ...
VLSID
2006
IEEE
14 years 1 months ago
2006
IEEE
As the IC process technology scales, the oxide thickness and operating voltage continues to decrease. The gate oxide thickness in recent and future IC process technology has appro...
GLVLSI
2011
IEEE
12 years 11 months ago
2011
IEEE
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...