1138 search results - page 149 / 228 » First-Order Model Checking Problems Parameterized by the Mod... |
ACSD
2003
IEEE
14 years 1 months ago
2003
IEEE
— We consider the problem of specifying a model of the Zero Copy Secured Protocol for the purpose of LTL verification with the SPIN Model Checker. ZCSP is based on Direct Memory...
CORR
2009
Springer
13 years 5 months ago
2009
Springer
Abstract. We apply Uppaal Tiga to automatically compute adaptive scheduling strategies for an industrial case study dealing with a state-of-the-art image processing pipeline of a p...
ICCAD
2004
IEEE
14 years 5 months ago
2004
IEEE
This paper presents a chip-level charged device model (CDM) electrostatic discharge (ESD) simulation method. The chip-level simulation is formulated as a DC analysis problem. A ne...
FSTTCS
2007
Springer
14 years 2 months ago
2007
Springer
We examine a bidirectional Propositional Dynamic Logic (PDL) for message sequence charts (MSCs) extending LTL and TLC− . Every formula is translated into an equivalent communicat...
CONCUR
1998
Springer
14 years 8 days ago
1998
Springer
Abstract. We summarize and reorganize some of the last decade's research on real-time extensions of temporal logic. Our main focus is on tableau constructions for model checki...