107 search results - page 15 / 22 » Fixed-Polynomial Size Circuit Bounds |
COCO
2005
Springer
13 years 9 months ago
2005
Springer
We exhibit an explicitly computable ‘pseudorandom’ generator stretching l bits into m(l) = lΩ(log l) bits that look random to constant-depth circuits of size m(l) with log m...
VLSID
2004
IEEE
14 years 8 months ago
2004
IEEE
{A new low-power design method produces CMOS circuits that consume the least dynamic power at the highest speed permitted under the technology constraint. A gate is characterized b...
CPAIOR
2007
Springer
14 years 1 months ago
2007
Springer
Abstract. In recent work binary decision diagrams (BDDs) were introduced as a technique for postoptimality analysis for integer programming. In this paper we show that much smaller...
ECCC
2010
13 years 7 months ago
2010
Much work has been done on learning various classes of "simple" monotone functions under the uniform distribution. In this paper we give the first unconditional lower bo...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Soft errors in logic are emerging as a significant reliability problem for VLSI designs. This paper presents novel circuit optimization techniques to mitigate soft error rates (SE...