1563 search results - page 10 / 313 » Flexible instruction processors |
DSD
2002
IEEE
14 years 1 months ago
2002
IEEE
Modern microprocessors schedule instructions dynamically in order to exploit instruction-level parallelism. It is necessary to increase instruction window size for improving instr...
CODES
2009
IEEE
14 years 3 months ago
2009
IEEE
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
SAMOS
2005
Springer
14 years 2 months ago
2005
Springer
—We describe the generation of the simulation environment for the Sandbridge Sandblaster multithreaded processor. The processor model is described using the Sandblaster architect...
CASES
2004
ACM
14 years 9 days ago
2004
ACM
Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. However, it is computationally expensive to automaticall...
DAC
2012
ACM
11 years 11 months ago
2012
ACM
Caches play an important role in embedded systems by bridging the performance gap between high speed processors and slow memory. At the same time, caches introduce imprecision in ...