1563 search results - page 11 / 313 » Flexible instruction processors |
MICRO
2010
IEEE
13 years 6 months ago
2010
IEEE
DAC
1997
ACM
14 years 23 days ago
1997
ACM
An experimental set of tools that generate instruction set simulators, assemblers, and disassemblers from a single description was developed to test if retargetable development to...
ICCD
2002
IEEE
14 years 5 months ago
2002
IEEE
A variety of factors is making it increasingly difficult and expensive to design and manufacture traditional Application Specific Integrated Circuits (ASICs). This has started a s...
FPGA
2004
ACM
14 years 1 months ago
2004
ACM
We describe an effort to prototype an Itanium microarchitecture using an FPGA. The microarchitecture model is written in the Bluespec hardware description language (HDL) and suppo...
ATS
2004
IEEE
14 years 9 days ago
2004
IEEE
TIS (Test Instruction Set) is an instruction level technique for CPU core self-testing. This method is based on enhancing a CPU instruction set with test instructions. TIS replace...