1563 search results - page 55 / 313 » Flexible instruction processors |
APCSAC
2004
IEEE
14 years 1 months ago
2004
IEEE
Abstract. While the fetch unit has been identified as one of the major bottlenecks of Simultaneous Multithreading architecture, several fetch schemes were proposed by prior works t...
DATE
2004
IEEE
2004
IEEE
Automatic Verification of Safety and Liveness for XScale-Like Processor Models Using WEB Refinements
14 years 1 months ago
We show how to automatically verify that complex XScale-like pipelined machine models satisfy the same safety and liveness properties as their corresponding instruction set archit...
FPL
2006
Springer
14 years 1 months ago
2006
Springer
This paper presents a reconfigurable functional unit (RFU) for an adaptive dynamic extensible processor. The processor can tune its extended instructions to the target application...
FCCM
2003
IEEE
14 years 3 months ago
2003
IEEE
A massively parallel single instruction multiple data stream (SIMD) processor designed specifically for cryptographic key search applications is presented. This design aims to ex...
FPGA
2000
ACM
14 years 1 months ago
2000
ACM
This paper describes a C compiler for a mixed Processor/FPGA architecture where the FPGA is a Reconfigurable Functional Unit (RFU). It presents three compilation techniques that c...