We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhan...
— We present the design, implementation, and performance evaluation of AMPS — a flexible, scalable proxy testbed that supports a wide and extensible set of next-generation pro...
Xiaolan (Ellen) Zhang, Michael K. Bradshaw, Yang G...
There is today little doubt on the fact that a high-performance and cost-effective Network-on-Chip can only be designed in 45nm and beyond under a relaxed synchronization assumpti...
Daniele Ludovici, Alessandro Strano, Georgi Nedelt...
We present NeST, a flexible software-only storage appliance designed to meet the storage needs of the Grid. NeST has three key features that make it well-suited for deployment in...
John Bent, Venkateshwaran Venkataramani, Nick LeRo...
Abstract. While Web Services ensure interoperability and extensibility for networked applications, they also complicate the deployment of highly collaborative systems, such as virt...
Qi Huang, Daniel A. Freedman, Ymir Vigfusson, Ken ...