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FPGA
2001
ACM
145views FPGA» more  FPGA 2001»
15 years 7 months ago
Simultaneous logic decomposition with technology mapping in FPGA designs
Conventional technology mapping algorithms for SRAM-based Field Programmable Gate Arrays (FPGAs) are normally carried out on a fixed logic decomposition of a circuit. The impact o...
Gang Chen, Jason Cong
DATE
1999
IEEE
134views Hardware» more  DATE 1999»
15 years 6 months ago
Verifying Imprecisely Working Arithmetic Circuits
If real number calculations are implemented as circuits, only a limited preciseness can be obtained. Hence, formal verification can not be used to prove the equivalence between th...
Michaela Huhn, Klaus Schneider, Thomas Kropf, Geor...
117
Voted
ICNP
1999
IEEE
15 years 6 months ago
ERUF: Early Regulation of Unresponsive Best-Effort Traffic
In this paper, we propose router mechanisms to regulate unresponsive best-effort traffic. By unresponsive traffic we mean flows that do not reduce their sending rate in response t...
Anand Rangarajan, Anurag Acharya
99
Voted
DAC
2006
ACM
16 years 3 months ago
An automated, reconfigurable, low-power RFID tag
This paper describes an ultra low power active RFID tag and its automated design flow. RFID primitives to be supported by the tag are enumerated with RFID macros and the behavior ...
Alex K. Jones, Raymond R. Hoare, Swapna R. Donthar...
199
Voted
VLDB
2007
ACM
225views Database» more  VLDB 2007»
16 years 2 months ago
An Approach to Optimize Data Processing in Business Processes
In order to optimize their revenues and profits, an increasing number of businesses organize their business activities in terms of business processes. Typically, they automate imp...
Marko Vrhovnik, Holger Schwarz, Oliver Suhre, Bern...