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DAC
2001
ACM
14 years 11 months ago
LOTTERYBUS: A New High-Performance Communication Architecture for System-on-Chip Designs
This paper presents LOTTERYBUS, a novel high-performance communication architecture for system-on-chip (SoC) designs. The LOTTERYBUS architecture was designed to address the follo...
Kanishka Lahiri, Anand Raghunathan, Ganesh Lakshmi...
INFOCOM
2006
IEEE
14 years 4 months ago
A Compound TCP Approach for High-Speed and Long Distance Networks
—Many applications require fast data transfer over high speed and long distance networks. However, standard TCP fails to fully utilize the network capacity due to the limitation ...
Kun Tan, Jingmin Song, Qian Zhang, Murari Sridhara...
CVPR
2008
IEEE
15 years 2 days ago
Adaptive parametrization of multivariate B-splines for image registration
We present an adaptive parametrization scheme for dynamic mesh refinement in the application of parametric image registration. The scheme is based on a refinement measure ensuring...
Michael Sass Hansen, Rasmus Larsen, Ben Glocker, N...
PERCOM
2005
ACM
14 years 9 months ago
Unleashing the Power of Wearable Devices in a SIP Infrastructure
The Session Initiation Protocol (SIP) has been widely adopted for Instant Messaging (IM) and VoIP telephony both by the enterprise and in service provider systems. Till now, SIP f...
Arup Acharya, Stefan Berger, Chandrasekhar Narayan...
ISCC
2009
IEEE
210views Communications» more  ISCC 2009»
14 years 4 months ago
Towards a Java bytecodes compiler for Nios II soft-core processor
Reconfigurable computing is one of the most recent research topics in computer science. The Altera™ Nios II soft-core processor can be included in a large set of reconfigurable ...
Willian dos Santos Lima, Renata Spolon Lobato, Ale...