161 search results - page 3 / 33 » Floorplanning with Datapath Optimization |
CODES
1996
IEEE
14 years 3 months ago
1996
IEEE
The partitioning of image processing algorithms with a novel hardware/software co-designframework (CoDe-X) is presented in this paper, where a new Xputer-architecture (parallel Ma...
ASPDAC
1995
ACM
14 years 2 months ago
1995
ACM
Abstract — A datapath synthesis system (DPSS) for the reconfigurable datapath architecture (rDPA) is presented. The DPSS allows automatic mapping of high level descriptions onto...
DAC
2000
ACM
14 years 3 months ago
2000
ACM
Datapath design is one of the most critical elements in the design of a high performance microprocessor. However datapath design is typically done manually, and is often custom st...
FCCM
2009
IEEE
14 years 5 months ago
2009
IEEE
This paper will describe the architecture of a compiler which will convert an untimed C description of a set of floating point expressions into a synthesizable datapath optimized ...
TVLSI
2008
13 years 10 months ago
2008
Abstract--In this paper, we introduce a novel substrate noise estimation technique during early floorplanning for mixed signal system-on-chip (SOC), based on block preference direc...