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» Floorplanning with Pin Assignment
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ICCAD
2007
IEEE
144views Hardware» more  ICCAD 2007»
14 years 4 months ago
Voltage island-driven floorplanning
— Energy efficiency has become one of the most important issues to be addressed in today’s System-on-a-Chip (SoC) designs. One way to lower the power consumption is to reduce ...
Qiang Ma, Evangeline F. Y. Young
DATE
2008
IEEE
103views Hardware» more  DATE 2008»
14 years 1 months ago
Novel Pin Assignment Algorithms for Components with Very High Pin Counts
The wiring effort and thus, the routability of electronic designs such as printed circuit boards, multi chip modules and single chip modules largely depends on the assignment of s...
Tilo Meister, Jens Lienig, Gisbert Thomke
ASPDAC
1995
ACM
96views Hardware» more  ASPDAC 1995»
13 years 11 months ago
Pin assignment and routing on a single-layer Pin Grid Array
Man-Fai Yu, Wayne Wei-Ming Dai
ICCAD
2007
IEEE
64views Hardware» more  ICCAD 2007»
14 years 4 months ago
A simultaneous bus orientation and bused pin flipping algorithm
— The orientation of a bus is defined as the direction from the Least Significant Bit (LSB) to the Most Significant Bit (MSB). Bused pin flipping is a property that allows severa...
Fan Mo, Robert K. Brayton
SLIP
2009
ACM
14 years 1 months ago
Integrated interlayer via planning and pin assignment for 3D ICs
As technology advances, 3D ICs are introduced for alleviating the interconnect problem coming with shrinking feature size and increasing integration density. In 3D ICs, one of the...
Xu He, Sheqin Dong, Xianlong Hong, Satoshi Goto