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» Flow Level Simulation of Large IP Networks
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AINA
2007
IEEE
14 years 1 months ago
Synthetic Trace-Driven Simulation of Cache Memory
The widening gap between CPU and memory speed has made caches an integral feature of modern highperformance processors. The high degree of configurability of cache memory can requ...
Rahman Hassan, Antony Harris, Nigel P. Topham, Ari...
NETWORK
2008
106views more  NETWORK 2008»
13 years 7 months ago
Toward internet-wide multipath routing
The Internet would be more efficient and robust if routers could flexibly divide traffic over multiple paths. Often, having one or two extra paths is sufficient for customizing pa...
Jiayue He, Jennifer Rexford
DATE
2009
IEEE
116views Hardware» more  DATE 2009»
14 years 2 months ago
A high-level debug environment for communication-centric debug
—A large part of a modern SOC’s debug complexity resides in the interaction between the main system components. ion-level debug moves the abstraction level of the debug process...
Kees Goossens, Bart Vermeulen, Ashkan Beyranvand N...
AHSWN
2006
79views more  AHSWN 2006»
13 years 7 months ago
Re-routing Instability in IEEE 802.11 Multi-hop Ad-hoc Networks
TCP throughput instability is a well-known phenomenon in IEEE 802.11 multi-hop ad-hoc networks. However, we find that this problem is not restricted to TCP traffic only, but also ...
Ping Chung Ng, Soung Chang Liew
DATE
2006
IEEE
128views Hardware» more  DATE 2006»
13 years 11 months ago
Platform-based design of wireless sensor networks for industrial applications
We present a methodology, an environment and supporting tools to map an application on a wireless sensor network (WSN). While the method is quite general, we use extensively an exa...
Alvise Bonivento, Luca P. Carloni, Alberto L. Sang...