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» Forensic engineering techniques for VLSI CAD tools
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CERA
2002
134views more  CERA 2002»
13 years 7 months ago
Design Parameterization for Concurrent Design and Manufacturing of Mechanical Systems
Design changes are frequently encountered in the product development process. The complexity of the design changes is multiplied when the product design involves multiple engineer...
Javier Silva, Kuang-Hua Chang
DAC
2002
ACM
14 years 9 months ago
Combining strengths of circuit-based and CNF-based algorithms for a high-performance SAT solver
We propose Satisfiability Checking (SAT) techniques that lead to a consistent performance improvement of up to 3x over state-ofthe-art SAT solvers like Chaff on important problem ...
Malay K. Ganai, Pranav Ashar, Aarti Gupta, Lintao ...
IMR
2004
Springer
14 years 1 months ago
Intuitive, Interactive, and Robust Modification and Optimization of Finite Element Models
Virtual prototyping and numerical simulations are increasingly replacing real mock-ups and experiments in industrial product development. Many of these simulations, e.g. for the p...
Katrin Bidmon, Dirc Rose, Thomas Ertl
ISPD
2004
ACM
189views Hardware» more  ISPD 2004»
14 years 1 months ago
Almost optimum placement legalization by minimum cost flow and dynamic programming
VLSI placement tools usually work in two steps: First, the cells that have to be placed are roughly spread out over the chip area ignoring disjointness (global placement). Then, i...
Ulrich Brenner, Anna Pauli, Jens Vygen
VLSID
2008
IEEE
122views VLSI» more  VLSID 2008»
14 years 2 months ago
Implementing the Best Processor Cores
It is well-known that varying architectural, technological and implementation aspects of embedded microprocessors, such as ARM, can produce widely differing performance and power ...
Vamsi Boppana, Rahoul Varma, S. Balajee