475 search results - page 19 / 95 » Formal Analysis of Processor Timing Models |
ICSE
1998
IEEE-ACM
13 years 11 months ago
1998
IEEE-ACM
The design, implementation, and testing of virtual environments is complicated by the concurrency and realtime features of these systems. Therefore, the development of formal meth...
DAC
2008
ACM
14 years 8 months ago
2008
ACM
This paper introduces an accurate and efficient electrical analysis of logic gates modeled as Multiple Voltage Threshold Models (MVTM) loaded by the associated interconnect. MVTMs...
CODES
2008
IEEE
14 years 1 months ago
2008
IEEE
The heterogeneity of modern MPSoC architectures, coupled with the increasing complexity of the applications mapped onto them has recently led to a lot of interest in hybrid perfor...
IWNAS
2008
IEEE
14 years 1 months ago
2008
IEEE
We study parallel job scheduling, where each job may be scheduled on any number of available processors in a given parallel system. We propose a mathematical model to estimate a j...
COMPSAC
2006
IEEE
14 years 1 months ago
2006
IEEE
Model-checking techniques are successfully used in the verification of both hardware and software systems of industrial relevance. Unfortunately, the capability of current techni...