575 search results - page 59 / 115 » Formal Coverification of Embedded Systems Using Model Checki... |
RSP
2006
IEEE
14 years 2 months ago
2006
IEEE
This paper addresses the need to integrate formal assertions into the modeling, implementation, and testing of statechart based designs. The paper describes an iterative process f...
ASYNC
2007
IEEE
14 years 15 days ago
2007
IEEE
Few formal verification techniques are currently available for asynchronous designs. In this paper, we describe a new approach for the formal verification of asynchronous architec...
FMCAD
2000
Springer
14 years 3 days ago
2000
Springer
Bus protocols are hard to specify correctly, and yet it is often critical and highly beneficial that their specifications are correct, complete, and unambiguous. The informal speci...
DSN
2002
IEEE
14 years 1 months ago
2002
IEEE
Model checking has been introduced as an automated technique to verify whether functional properties, expressed in a formal logic like computational tree logic (CTL), do hold in a...
CAV
2009
Springer
14 years 9 months ago
2009
Springer
We present HOMER, an observational-equivalence model checker for the 3rd-order fragment of Idealized Algol (IA) augmented with iteration. It works by first translating terms of the...