Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
Ofer Shacham, Megan Wachs, Alex Solomatnikov, Amin...
This paper gives an overview of recent advances in Real-Time Maude. Real-Time Maude extends the Maude rewriting logic tool to support formal specification and analysis of object-...
Abstract. Consider an agent executing a plan with nondeterministic actions, in a dynamic environment, which might fail. Suppose that she is given a description of this action domai...
Thomas Eiter, Esra Erdem, Wolfgang Faber, Já...
We consider the problem of how an agent's knowledge can be updated. We propose a formal method of knowledge update on the basis of the semantics of modal logic S5. In our met...
We propose an interface specification language based on grammars for modular software model checking. In our interface specification language, component interfaces are specified a...