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VSTTE
2005
Springer
15 years 10 months ago
Model Checking: Back and Forth between Hardware and Software
The interplay back and forth between software model checking and hardware model checking has been fruitful for both. Originally intended for the analysis of concurrent software, mo...
Edmund M. Clarke, Anubhav Gupta, Himanshu Jain, He...
ICSE
2000
IEEE-ACM
15 years 8 months ago
Producing more reliable software: mature software engineering process vs. state-of-the-art technology?
: Producing More Reliable Software: Mature Software Engineering Process vs. State-of-the-Art Technology? A customer of high assurance software recently sponsored a software enginee...
James C. Widmaier
HYBRID
2010
Springer
15 years 6 months ago
Receding horizon control for temporal logic specifications
In this paper, we describe a receding horizon scheme that satisfies a class of linear temporal logic specifications sufficient to describe a wide range of properties including saf...
Tichakorn Wongpiromsarn, Ufuk Topcu, Richard M. Mu...
BMCBI
2006
114views more  BMCBI 2006»
15 years 4 months ago
Epigenetic acquisition of inducibility of type III cytotoxicity in P. aeruginosa
Background: Pseudomonas aeruginosa, an opportunistic pathogen, is often encountered in chronic lung diseases such as cystic fibrosis or chronic obstructive pneumonia, as well as a...
Didier Filopon, Annabelle Mérieau, Gilles B...
MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
15 years 4 months ago
Verification of chip multiprocessor memory systems using a relaxed scoreboard
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
Ofer Shacham, Megan Wachs, Alex Solomatnikov, Amin...