This paper presents the real-time model checker RAVEN and related theoretical background. RAVEN augments the efficiency of traditional symbolic model checking with possibilities to...
We present a formal verification methodology that we have used on a computer system design project. The methodology integrates a temporal logic model checker with a conventional pr...
This paper presents a case study for automatic verification using the Communicating Sequential Processes formalism. The case study concerns the Futurebus+ cache coherency standard...
Architectural decisions for DSP modules are often analyzed using high level C models. Such high-level explorations allow early examination of the algorithms and the architectural ...
We use History Dependent Automata (HD-automata) as a syntax-indepentend formalism to check compatibility of services at binding time in Service-Oriented Computing. Informally speak...
Vincenzo Ciancia, Gian Luigi Ferrari, Marco Pistor...