1525 search results - page 35 / 305 » Formal Models for Communication-Based Design |
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
Formal verification techniques have been playing an important role in pre-silicon validation processes. One of the most important points considered in performing formal verificati...
ICALP
2000
Springer
13 years 11 months ago
2000
Springer
Graph processes are used in order to formalize the relation between global requirement specifications of multi-agent systems by means of message sequence charts, and implementatio...
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
System-on-chip (SoC) designs use bus protocols for high performance data transfer among the Intellectual Property (IP) cores. These protocols incorporate advanced features such as...
JSA
2008
13 years 7 months ago
2008
We present a framework for the formal verification of abstract state machine (ASM) designs using the multiway decision graphs (MDG) tool. ASM is a state based language for describ...
HASE
2008
IEEE
14 years 2 months ago
2008
IEEE
— UML 1 sequence diagrams have been widely employed for modeling software requirements and design. UML 2 introduced many new features, such as Combined Fragments, to make sequenc...