726 search results - page 10 / 146 » Formal Verification and Validation of Interactive Systems Sp... |
DATE
1998
IEEE
14 years 21 days ago
1998
IEEE
A formal definition of the general VHDLAMS analogue system has been proposed to relate the way in which the language affects the specification of a non-linear discontinuous analog...
DATE
2004
IEEE
14 years 5 days ago
2004
IEEE
System level modeling with executable languages such as C/C++ has been crucial in the development of large electronic systems from general processors to application specific desig...
SIGSOFT
2007
ACM
14 years 9 months ago
2007
ACM
Message Sequence Charts (MSCs) are a widely used visual formalism for scenario-based specifications of distributed reactive systems. In its conventional usage, an MSC captures an ...
ICSE
2007
IEEE-ACM
14 years 8 months ago
2007
IEEE-ACM
Abstract. In software architecture, components represent the computational units of a system and connectors represent the interactions among those units. Making decisions about the...
ICSE
2008
IEEE-ACM
14 years 8 months ago
2008
IEEE-ACM
This paper examines the suitability and use of runtime verification as means for monitoring security protocols and their properties. In particular, we employ the runtime verificat...