216 search results - page 13 / 44 » Formal Verification of Safety Properties in Timed Circuits |
FMSD
2010
13 years 6 months ago
2010
Abstract Modeling and Simulation Aided Verification of Analog/MixedSignal Circuits S. Little and C. Myers (University of Utah, USA) Monday, July 14, 14:00-17:00 4 14:00-14:40 fSpic...
FMCAD
2008
Springer
13 years 9 months ago
2008
Springer
el Sequential Memory Abstraction for Model Checking Per Bjesse Advanced Technology Group Synopsys Inc. Many designs intermingle large memories with wide data paths and nontrivial c...
ASYNC
1999
IEEE
13 years 12 months ago
1999
IEEE
This paper discusses the application of the timing analysis tool ATACS to the high performance, self-resetting and delayed-reset domino circuits being designed at IBM's Austi...
CANS
2009
Springer
14 years 2 months ago
2009
Springer
Abstract. Anonymous credentials are widely used to certify properties of a credential owner or to support the owner to demand valuable services, while hiding the user’s identity ...
POPL
2007
ACM
14 years 8 months ago
2007
ACM
In recent years we have seen great progress made in the area of automatic source-level static analysis tools. However, most of today's program verification tools are limited ...