1446 search results - page 268 / 290 » Formal analysis of hardware requirements |
MICRO
2009
IEEE
14 years 2 months ago
2009
IEEE
Despite flash memory’s promise, it suffers from many idiosyncrasies such as limited durability, data integrity problems, and asymmetry in operation granularity. As architects, ...
ISCA
2008
IEEE
14 years 2 months ago
2008
IEEE
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
IEEEPACT
2006
IEEE
14 years 1 months ago
2006
IEEE
As chip multiprocessors (CMPs) become increasingly mainstream, architects have likewise become more interested in how best to share a cache hierarchy among multiple simultaneous t...
VALUETOOLS
2006
ACM
14 years 1 months ago
2006
ACM
Cache locality optimization is an efficient way for reducing the idle time of modern processors in waiting for needed data. This kind of optimization can be achieved either on the...
ISCC
2005
IEEE
14 years 1 months ago
2005
IEEE
As the Internet grows at a very rapid pace, so does the incidence of attack events and documented unlawful intrusions. The Network Intrusion Detection Systems (NIDSes) are designe...