Abstract. In this paper, we propose a verification methodology for System-OnChip (SoC) design using Unified Modeling Language (UML). We introduce UML as a formal model to analyze a...
This paper discusses the adaptation of the PVS theorem prover for performing analysis of real-time systems written in the ASTRAL formal specification language. A number of issues w...
This paper introduces an extractive approach to building-up a product line based on existing systems. Thereby, we focus on the analysis of common functionalities across different ...
Designing architectural frameworks without the aid of formal modeling is error prone. But, unless supported by analysis, formal modeling is prone to its own class of errors, in wh...
In the recent literature on time representation, an effort has been made to characterize the notion of time granularity and the relationships between granularities, in order to ha...