164 search results - page 20 / 33 » Formal testing from timed finite state machines |
DFT
2007
IEEE
14 years 4 months ago
2007
IEEE
The paper discusses a novel approach for reduction of fault detection latency in a selfchecking sequential circuit. The Authors propose decomposing the finite state machine (FSM) ...
ICCAD
2010
IEEE
13 years 8 months ago
2010
IEEE
Reducing circuit's peak current plays an important role in circuit reliability in deep sub-micron era. For sequential circuits, it is observed that the peak current has a str...
ALT
2010
Springer
13 years 12 months ago
2010
Springer
Many algorithms for grammatical inference can be viewed as instances of a more general algorithm which maintains a set of primitive elements, which distributionally define sets of ...
FM
2008
Springer
13 years 12 months ago
2008
Springer
Abstract. Despite more then 30 years of research on protocol specification, the major protocols deployed in the Internet, such as TCP, are described only in informal prose RFCs and...
DATE
2000
IEEE
14 years 2 months ago
2000
IEEE
∗∗ Functional BIST is a promising solution for self-testing complex digital systems at reduced costs in terms of area and performance degradation. The present paper addresses t...