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» Formal verification of analog designs using MetiTarski
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FM
2009
Springer
154views Formal Methods» more  FM 2009»
13 years 5 months ago
Specification and Verification of Web Applications in Rewriting Logic
Abstract. This paper presents a Rewriting Logic framework that formalizes the interactions between Web servers and Web browsers through icating protocol abstracting HTTP. The propo...
María Alpuente, Demis Ballis, Daniel Romero
ENTCS
2006
185views more  ENTCS 2006»
13 years 7 months ago
Time Domain Verification of Oscillator Circuit Properties
The application of formal methods to analog and mixed signal circuits requires efficient methods tructing abstractions of circuit behaviors. This paper concerns the verification o...
Goran Frehse, Bruce H. Krogh, Rob A. Rutenbar, Ode...
ICCAD
2006
IEEE
208views Hardware» more  ICCAD 2006»
14 years 4 months ago
Automation in mixed-signal design: challenges and solutions in the wake of the nano era
The use of CMOS nanometer technologies at 65 nm and below will pose serious challenges on the design of mixed-signal integrated systems in the very near future. Rising design comp...
Trent McConaghy, Georges G. E. Gielen
DAC
2005
ACM
14 years 8 months ago
IODINE: a tool to automatically infer dynamic invariants for hardware designs
We describe IODINE, a tool to automatically extract likely design properties using dynamic analysis. A practical bottleneck in the formal verification of hardware designs is the n...
Sudheendra Hangal, Naveen Chandra, Sridhar Narayan...
DAC
1996
ACM
13 years 11 months ago
Functional Verification Methodology of Chameleon Processor
- Functional verification of the new generation microprocessor developed by SGS-THOMSON Microelectronics makes extensive use of advanced technologies. This paper presents a global ...
Françoise Casaubieilh, Anthony McIsaac, Mik...