112 search results - page 11 / 23 » Formalization of fFSM Model and Its Verification |
113
Voted
ASM
2008
ASM
15 years 5 months ago
2008
ASM
UML-B provides a graphical front end for Event-B. It adds support for class-oriented and state machine modelling. UML-B is similar to UML but has its own meta-model. UML-B provides...
175
Voted
DLT
2009
15 years 1 months ago
2009
Abstract. Temporal logics are a well investigated formalism for the specification and verification of reactive systems. Using formal verification techniques, we can ensure the corr...
122
Voted
MICRO
2008
IEEE
15 years 3 months ago
2008
IEEE
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
113
Voted
IJNSEC
2010
14 years 10 months ago
2010
In this paper, we construct two verifiable attribute-based encryption (VABE) schemes. One is with a single authority, and the other is with multi authorities. Not only our schemes ...
118
Voted
IAT
2006
IEEE
15 years 9 months ago
2006
IEEE
Within many domains, among which biological and cognitive areas, multiple interacting processes occur among agents with dynamics that are hard to handle. Current approaches to ana...