This paper proposes the general paradigm to build Q'tron neural networks (NNs) for visual cryptography. Given a visual encryption scheme, usually described using an access st...
The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...
We present an integer-linear-programming-based approach for estimating the maximum instantaneous current through the power supply lines for CMOS circuits. It produces the exact so...
Using a directed acyclic graph (dag) model of algorithms, we solve a problem related to precedenceconstrained multiprocessor schedules for array computations: Given a sequence of ...
We study integrated prefetching and caching problems following the work of Cao et. al. [3] and Kimbrel and Karlin [13]. Cao et. al. and Kimbrel and Karlin gave approximation algor...