This paper presents a method to reduce the complexity of a linear or linearized (small-signal) analog circuit. The reduction technique, based on quality-error ranking, can be used...
Walter Daems, Georges G. E. Gielen, Willy M. C. Sa...
We propose a unifying method for analysis of scheduling problems in real-time systems. The method is based on ACSR-VP, a real-time process algebra with value-passing capabilities....
Hee-Hwan Kwak, Insup Lee, Anna Philippou, Jin-Youn...
Fault tree analysis is a traditional and well-established technique for analyzing system design and robustness. Its purpose is to identify sets of basic events, called cut sets, wh...
Marco Bozzano, Alessandro Cimatti, Francesco Tappa...
d abstract) Prateek Gupta and Vitaly Shmatikov The University of Texas at Austin We present a cryptographically sound formal method for proving correctness of key exchange protoco...
Chaining can reduce the number of iterations required for symbolic state-space generation and model-checking, especially in Petri nets and similar asynchronous systems, but require...
Ming-Ying Chung, Gianfranco Ciardo, Andy Jinqing Y...