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» Framework for Fault Analysis and Test Generation in DRAMs
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IOLTS
2008
IEEE
117views Hardware» more  IOLTS 2008»
14 years 1 months ago
Verification and Analysis of Self-Checking Properties through ATPG
Present and future semiconductor technologies are characterized by increasing parameters variations as well as an increasing susceptibility to external disturbances. Transient err...
Marc Hunger, Sybille Hellebrand
CCGRID
2006
IEEE
14 years 1 months ago
GRENCHMARK: A Framework for Analyzing, Testing, and Comparing Grids
Grid computing is becoming the natural way to aggregate and share large sets of heterogeneous resources. With the infrastructure becoming ready for the challenge, current grid dev...
Alexandru Iosup, Dick H. J. Epema
ATS
2000
IEEE
134views Hardware» more  ATS 2000»
13 years 11 months ago
Fsimac: a fault simulator for asynchronous sequential circuits
At very high frequencies, the major potential of asynchronous circuits is absence of clock skew and, through that, better exploitation of relative timing relations. This paper pre...
Susmita Sur-Kolay, Marly Roncken, Ken S. Stevens, ...
DAC
2010
ACM
13 years 10 months ago
Efficient fault simulation on many-core processors
Fault simulation is essential in test generation, design for test and reliability assessment of integrated circuits. Reliability analysis and the simulation of self-test structure...
Michael A. Kochte, Marcel Schaal, Hans-Joachim Wun...
TSE
2010
151views more  TSE 2010»
13 years 5 months ago
The Probabilistic Program Dependence Graph and Its Application to Fault Diagnosis
This paper presents an innovative model of a program’s internal behavior over a set of test inputs, called the probabilistic program dependence graph (PPDG), that facilitates pr...
George K. Baah, Andy Podgurski, Mary Jean Harrold