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DATE
1998
IEEE
68views Hardware» more  DATE 1998»
13 years 11 months ago
Scheduling of Conditional Process Graphs for the Synthesis of Embedded Systems
We present an approach to process scheduling based on an abstract graph representation which captures both dataflow and the flow of control. Target architectures consist of severa...
Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa...
ACSD
2010
IEEE
251views Hardware» more  ACSD 2010»
13 years 5 months ago
Modular Interpretation of Heterogeneous Modeling Diagrams into Synchronous Equations Using Static Single Assignment
Abstract--The ANR project SPaCIFY develops a domainspecific programming environment, Synoptic, to engineer embedded software for space applications. Synoptic is an Eclipse-based mo...
Jean-Pierre Talpin, Julien Ouy, Thierry Gautier, L...
JUCS
2000
120views more  JUCS 2000»
13 years 7 months ago
Execution and Cache Performance of the Scheduled Dataflow Architecture
: This paper presents an evaluation of our Scheduled Dataflow (SDF) Processor. Recent focus in the field of new processor architectures is mainly on VLIW (e.g. IA-64), superscalar ...
Krishna M. Kavi, Joseph Arul, Roberto Giorgi
ERSHOV
2009
Springer
13 years 5 months ago
From Dynamic to Static and Back: Riding the Roller Coaster of Information-Flow Control Research
Abstract. Historically, dynamic techniques are the pioneers of the area of information flow in the 70's. In their seminal work, Denning and Denning suggest a static alternativ...
Andrei Sabelfeld, Alejandro Russo
FM
1999
Springer
121views Formal Methods» more  FM 1999»
13 years 11 months ago
Incremental Design of a Power Transformer Station Controller Using a Controller Synthesis Methodology
ÐIn this paper, we describe the incremental specification of a power transformer station controller using a controller synthesis methodology. We specify the main requirements as s...
Hervé Marchand, Mazen Samaan