53 search results - page 4 / 11 » From Equation to VHDL: Using Rewriting Logic for Automated F... |
FLOPS
2008
Springer
13 years 9 months ago
2008
Springer
Narrowing extends rewriting with logic capabilities by allowing free variables in terms and replacing matching with unification. Narrowing has been widely used in different context...
DAC
2002
ACM
14 years 8 months ago
2002
ACM
A central problem in functional verification is to check that a circuit block is producing correct outputs while enforcing that the environment is providing legal inputs. To attac...
ICFP
2003
ACM
14 years 7 months ago
2003
ACM
The task of designing and implementing a compiler can be a difficult and error-prone process. In this paper, we present proach based on the use of higher-order abstract syntax and...
LISP
2006
13 years 7 months ago
2006
The task of designing and implementing a compiler can be a difficult and error-prone process. In this paper, we present a new approach based on the igher-order abstract syntax and ...
CADE
2008
Springer
14 years 7 months ago
2008
Springer
We propose a procedure for automated implicit inductive theorem proving for equational specifications made of rewrite rules with conditions and constraints. The constraints are int...