570 search results - page 108 / 114 » From Program Verification to Program Synthesis |
CF
2007
ACM
14 years 2 months ago
2007
ACM
This paper presents a novel architectural technique to hide fetch latency overhead of hardware encrypted and authenticated memory. A number of recent secure processor designs have...
TSE
2008
13 years 10 months ago
2008
We propose an interface specification language based on grammars for modular software model checking. In our interface specification language, component interfaces are specified a...
ISCA
2011
IEEE
13 years 2 months ago
2011
IEEE
A growing body of work has compiled a strong case for the single-ISA heterogeneous multi-core paradigm. A single-ISA heterogeneous multi-core provides multiple, differently-design...
DAC
2005
ACM
14 years 11 months ago
2005
ACM
While the past research discussed several advantages of multiprocessor-system-on-a-chip (MPSOC) architectures from both area utilization and design verification perspectives over ...
CCS
2009
ACM
14 years 11 months ago
2009
ACM
Inlined Reference Monitor (IRM) is an established enforcement mechanism for history-based access control policies. IRM enforcement injects monitoring code into the binary of an un...