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132
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GLVLSI
2007
IEEE
141views VLSI» more  GLVLSI 2007»
15 years 10 months ago
Transition-activity aware design of reduction-stages for parallel multipliers
We propose an interconnect reorganization algorithm for reduction stages in parallel multipliers. It aims at minimizing power consumption for given static probabilities at the pri...
Saeeid Tahmasbi Oskuii, Per Gunnar Kjeldsberg, Osc...
137
Voted
ISCA
2007
IEEE
146views Hardware» more  ISCA 2007»
15 years 10 months ago
Hardware atomicity for reliable software speculation
Speculative compiler optimizations are effective in improving both single-thread performance and reducing power consumption, but their implementation introduces significant compl...
Naveen Neelakantam, Ravi Rajwar, Suresh Srinivas, ...
149
Voted
DRM
2007
Springer
15 years 10 months ago
Mechanism for software tamper resistance: an application of white-box cryptography
In software protection we typically have to deal with the white-box attack model. In this model an attacker is assumed to have full access to the software and full control over it...
Wil Michiels, Paul Gorissen
132
Voted
CODES
2006
IEEE
15 years 9 months ago
Methodology for attack on a Java-based PDA
Although mobile Java code is frequently executed on many wireless devices, the susceptibility to electromagnetic (EM) attacks is largely unknown. If analysis of EM waves emanating...
Catherine H. Gebotys, Brian A. White
141
Voted
OOPSLA
2005
Springer
15 years 9 months ago
Adding trace matching with free variables to AspectJ
An aspect observes the execution of a base program; when certain actions occur, the aspect runs some extra code of its own. In the AspectJ language, the observations that an aspec...
Chris Allan, Pavel Avgustinov, Aske Simon Christen...