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ICCD
2006
IEEE
117views Hardware» more  ICCD 2006»
14 years 6 months ago
Fast, Performance-Optimized Partial Match Address Compression for Low-Latency On-Chip Address Buses
— The influence of interconnects on processor performance and cost is becoming increasingly pronounced with technology scaling. In this paper, we present a fast compression sche...
Jiangjiang Liu, Krishnan Sundaresan, Nihar R. Maha...
SMA
2009
ACM
105views Solid Modeling» more  SMA 2009»
14 years 4 months ago
SOT: compact representation for tetrahedral meshes
The Corner Table (CT) promoted by Rossignac et al. provides a simple and efficient representation of triangle meshes, storing 6 integer references per triangle (3 vertex reference...
Topraj Gurung, Jarek Rossignac
PAM
2007
Springer
14 years 3 months ago
Packet Capture in 10-Gigabit Ethernet Environments Using Contemporary Commodity Hardware
Abstract. Tracing traffic using commodity hardware in contemporary highspeed access or aggregation networks such as 10-Gigabit Ethernet is an increasingly common yet challenging t...
Fabian Schneider, Jörg Wallerich, Anja Feldma...
STACS
2007
Springer
14 years 3 months ago
A Deterministic Algorithm for Summarizing Asynchronous Streams over a Sliding Window
We consider the problem of maintaining aggregates over recent elements of a massive data stream. Motivated by applications involving network data, we consider asynchronous data str...
Costas Busch, Srikanta Tirthapura
ASPLOS
2000
ACM
14 years 2 months ago
Frequent Value Locality and Value-Centric Data Cache Design
By studying the behavior of programs in the SPECint95 suite we observed that six out of eight programs exhibit a new kind of value locality, the frequent value locality, according...
Youtao Zhang, Jun Yang 0002, Rajiv Gupta