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DAC
2008
ACM
15 years 6 months ago
SHIELD: a software hardware design methodology for security and reliability of MPSoCs
Security of MPSoCs is an emerging area of concern in embedded systems. Security is jeopardized by code injection attacks, which are the most common types of software attacks. Prev...
Krutartha Patel, Sri Parameswaran
INTENSIVE
2009
IEEE
15 years 11 months ago
Accelerating K-Means on the Graphics Processor via CUDA
In this paper an optimized k-means implementation on the graphics processing unit (GPU) is presented. NVIDIA’s Compute Unified Device Architecture (CUDA), available from the G8...
Mario Zechner, Michael Granitzer
COMSWARE
2007
IEEE
15 years 11 months ago
WiFiDump - A Novel Architecture for Wireless Network Debugging
— 802.11 usage has exploded and broken all barriers for which it was originally proposed. This has resulted in research for its non-legacy usages. Such usages require study of pa...
Abhijit Bagri, Mohit Mundhra, Abhinav Pathak, Bhas...
IPPS
2005
IEEE
15 years 10 months ago
BioFilter: An Architecture for Parallel Deployment and Dynamic Chaining of Standalone Bioinformatics Tools
A large number of bioinformatics analysis tools available today are processor intensive. Keeping in mind that the amount of biological data to be analyzed is growing steadily, and...
Thomas S. Brettin, Avinash Kewalramani
ISCAS
2005
IEEE
132views Hardware» more  ISCAS 2005»
15 years 10 months ago
A high performance distributed-parallel-processor architecture for 3D IIR digital filters
—Real-time spatio-temporal VLSI 3D IIR digital filters may be used for imaging or beamforming applications employing 3D input signals from synchronously-sampled multi-sensor arra...
Arjuna Madanayake, Leonard T. Bruton