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MAM
2006
125views more  MAM 2006»
13 years 7 months ago
Stream computations organized for reconfigurable execution
Reconfigurable systems can offer the high spatial parallelism and fine-grained, bit-level resource control traditionally associated with hardware implementations, along with the f...
André DeHon, Yury Markovsky, Eylon Caspi, M...
ISCA
1998
IEEE
151views Hardware» more  ISCA 1998»
13 years 11 months ago
Integrated Predicated and Speculative Execution in the IMPACT EPIC Architecture
Explicitly Parallel Instruction Computing (EPIC) architectures require the compiler to express program instruction level parallelism directly to the hardware. EPIC techniques whic...
David I. August, Daniel A. Connors, Scott A. Mahlk...
IEEEPACT
2009
IEEE
13 years 5 months ago
Region Based Structure Layout Optimization by Selective Data Copying
As the gap between processor and memory continues to grow, memory performance becomes a key performance bottleneck for many applications. Compilers therefore increasingly seek to m...
Sandya S. Mannarswamy, Ramaswamy Govindarajan, Ris...
WFLP
2000
Springer
124views Algorithms» more  WFLP 2000»
13 years 11 months ago
A Formal Approach to Reasoning about the Effectiveness of Partial Evaluation
We introduce a framework for assessing the effectiveness of partial evaluators in functional logic languages. Our framework is based on properties of the rewrite system that models...
Elvira Albert, Sergio Antoy, Germán Vidal
COLT
1999
Springer
13 years 11 months ago
On a Generalized Notion of Mistake Bounds
This paper proposes the use of constructive ordinals as mistake bounds in the on-line learning model. This approach elegantly generalizes the applicability of the on-line mistake ...
Sanjay Jain, Arun Sharma