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DAC
2012
ACM
11 years 10 months ago
A metric for layout-friendly microarchitecture optimization in high-level synthesis
In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...
Jason Cong, Bin Liu
IEEEPACT
2009
IEEE
13 years 5 months ago
Adaptive Locks: Combining Transactions and Locks for Efficient Concurrency
Transactional memory is being advanced as an alternative to traditional lock-based synchronization for concurrent programming. Transactional memory simplifies the programming mode...
Takayuki Usui, Reimer Behrends, Jacob Evans, Yanni...
IEEEPACT
2008
IEEE
14 years 2 months ago
Multitasking workload scheduling on flexible-core chip multiprocessors
While technology trends have ushered in the age of chip multiprocessors (CMP) and enabled designers to place an increasing number of cores on chip, a fundamental question is what ...
Divya Gulati, Changkyu Kim, Simha Sethumadhavan, S...
BIRTHDAY
2006
Springer
13 years 11 months ago
Coordination of Actions in an Autonomous Robotic System
Robots are autonomous agents whose actions are performed in the real world during a period of time. There are a number of general constraints on such actions, for example that the ...
Erik Sandewall
CCS
2003
ACM
14 years 1 months ago
Secure protocol composition
This paper continues the program initiated in [5], towards a derivation system for security protocols. The general idea is that complex protocols can be formally derived, starting...
Anupam Datta, Ante Derek, John C. Mitchell, Dusko ...