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ARCS
2006
Springer
13 years 11 months ago
Combitgen: A new approach for creating partial bitstreams in Virtex-II Pro
Today's FPGAs (Field Programmable Gate Arrays) are widely used, but not to their full potential. In Virtex series FPGAs from Xilinx a special feature, the dynamic and partial...
Christopher Claus, Florian Helmut Müller, Wal...
ISCAS
1999
IEEE
85views Hardware» more  ISCAS 1999»
13 years 12 months ago
Equivalence classes of clone circuits for physical-design benchmarking
To provide a better understanding of physical design algorithms and the underlying circuit architecture they are targeting, we need to exercise the algorithms and architectures wi...
Michael D. Hutton, Jonathan Rose
ICIP
2001
IEEE
14 years 9 months ago
A fully scalable 3D subband video codec
Multimedia transmissions over heterogeneous networks require a high degree of flexibility from video compression systems. They are expected to be fully scalable, that is to say to...
Béatrice Pesquet-Popescu, Boris Felts, Mari...
ISPD
1997
ACM
105views Hardware» more  ISPD 1997»
13 years 12 months ago
Regular layout generation of logically optimized datapaths
The inherent distortion of the structural regularity of VLSI datapaths after logic optimization has until now precluded dense regular layouts of optimized datapaths despite their ...
R. X. T. Nijssen, C. A. J. van Eijk
ICCAD
2003
IEEE
193views Hardware» more  ICCAD 2003»
14 years 28 days ago
FROSTY: A Fast Hierarchy Extractor for Industrial CMOS Circuits
: This paper presents FROSTY, a computer program for automatically extracting the hierarchy of a large-scale digital CMOS circuit from its transistor-level netlist description and ...
Lei Yang, C.-J. Richard Shi