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» Full System Simulation and Verification Framework
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DAC
2008
ACM
14 years 8 months ago
Partial order reduction for scalable testing of systemC TLM designs
A SystemC simulation kernel consists of a deterministic implementation of the scheduler, whose specification is nondeterministic. To leverage testing of a SystemC TLM design, we f...
Sudipta Kundu, Malay K. Ganai, Rajesh Gupta
CODES
2009
IEEE
14 years 2 months ago
Using binary translation in event driven simulation for fast and flexible MPSoC simulation
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
Marius Gligor, Nicolas Fournel, Frédé...
DAC
1999
ACM
13 years 12 months ago
Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification
We present our practical experience in the modeling and integration of cycle/phase-accurate instruction set architecture (ISA) models of digital signal processors (DSPs) with othe...
Lisa M. Guerra, Joachim Fitzner, Dipankar Talukdar...
JSS
2011
150views more  JSS 2011»
13 years 1 months ago
A novel general framework for automatic and cost-effective handling of recoverable temporal violations in scientific workflow sy
Due to the complex nature of scientific workflow environments, temporal violations often take place and may severely reduce the timeliness of the execution’s results. To handle ...
Xiao Liu, Zhiwei Ni, Zhangjun Wu, Dong Yuan, Jinju...
CORR
2008
Springer
107views Education» more  CORR 2008»
13 years 7 months ago
A Computational Framework for the Near Elimination of Spreadsheet Risk
We present Risk Integrated's Enterprise Spreadsheet Platform (ESP), a technical approach to the near-elimination of spreadsheet risk in the enterprise computing environment, ...
Yusuf Jafry, Fredrika Sidoroff, Roger Chi