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ESTIMEDIA
2005
Springer
14 years 1 months ago
Custom Processor Design Using NISC: A Case-Study on DCT algorithm
Designing Application-Specific Instruction-set Processors (ASIPs) usually requires designing a custom datapath, and modifying instruction-set, instruction decoder, and compiler. A...
Bita Gorjiara, Daniel D. Gajski
DEXAW
2003
IEEE
108views Database» more  DEXAW 2003»
14 years 1 months ago
A Protocol for Programmable Smart Cards
This paper presents an open protocol for interoperability across multi-vendor programmable smart cards. It allows exposition of on-card storage and cryptographic services to host ...
Tommaso Cucinotta, Marco Di Natale, David Corcoran
DFT
2003
IEEE
113views VLSI» more  DFT 2003»
14 years 1 months ago
Buffer and Controller Minimisation for Time-Constrained Testing of System-On-Chip
Test scheduling and Test Access Mechanism (TAM) design are two important tasks in the development of a System-on-Chip (SOC) test solution. Previous test scheduling techniques assu...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...
MOBILITY
2009
ACM
14 years 21 days ago
Context adaptative systems based on horizontal architecture for ubiquitous computing
Many adaptative context-aware middleware exist and mostly rely on so-called vertical architectures that offer a functional decomposition for context-awareness. This architecture ...
Nicolas Ferry, Stephane Lavirotte, Jean-Yves Tigli...
HPDC
2000
IEEE
14 years 14 days ago
Event Services for High Performance Computing
The Internet and the Grid are changing the face of high performance computing. Rather than tightly-coupled SPMD-style components running in a single cluster, on a parallel machine...
Greg Eisenhauer, Fabián E. Bustamante, Kars...