123 search results - page 18 / 25 » Functional Test Generation for FSMs by Fault Extraction |
DAC
2006
ACM
14 years 8 months ago
2006
ACM
The delay fault test pattern set generated by timing unaware commercial ATPG tools mostly affects very short paths, thereby increasing the escape chance of smaller delay defects. ...
ISESE
2006
IEEE
14 years 1 months ago
2006
IEEE
Effective testing of safety-critical real-time embedded software is difficult and expensive. Many companies are hesitant about the cost of formalized criteria-based testing and a...
CEC
2005
IEEE
14 years 1 months ago
2005
IEEE
Testing of VLSI circuits can cause generation of excessive heat which can damage the chips under test. In the random testing environment, high-performance CMOS circuits consume sig...
ICCD
2003
IEEE
14 years 23 days ago
2003
IEEE
As the technology is shrinking toward 50 nm and the working frequency is going into multi gigahertz range, the effect of interconnects on functionality and performance of system-o...
MBEES
2008
13 years 9 months ago
2008
: In this paper, we discuss adjustable coverage criteria and their combinations in model-based testing. We formalize coverage criteria and specify test goals using OCL. Then, we pr...